Design of a Generalized Coprocessor for Software Defined Radios on a Reconfigurable Computing Platform

Software defined Radio platform developed so far are designed for particular application. Current reconfigurable computing technology allows designers to implement complete embedded computing systems on a single FPGA. This paper concentrates on designing a reconfigurable platform which consists of reconfigurable coprocessors that can be used in various applications. The architecture that we have developed for the generic reconfigurable coprocessor is well suited for multiple application domains. It ties in to the sequential RISC processor based C programming framework where in the coprocessor performs specific functions, replacing a C function call. The methodology adopted to develop reconfigurable platform can be implemented for performing mathematical operation such as addition, subtraction and to perform complex operation such as Autocorrelation, it can also be used in Image Processing, Cryptography etc. As an example to illustrate this methodology reconfigurable coprocessor consisting of wrapper module along with controller module are designed to control external device like LCD. The architecture of the proposed methodology presented in this paper were prototyped using a Cyclone IV Starter Board (DEO Nano), which is based on Nios II Embedded Evaluation Kit.